Test J: the Memory Mirror Is Inoperative - Does Not Operate From the Memory Set Switch

PINPOINT TEST J: THE MEMORY MIRROR IS INOPERATIVE - DOES NOT OPERATE FROM THE MEMORY SET SWITCH

J1-J4:

J5-J7:

J7-J9:

J9-J11:

J11-J13:

J13-J14:

J14-J16:

Normal Operation
The memory exterior mirrors are controlled by the DSM. The memory switch is grounded through circuit 875 (BK/LB). When memory button 1 is pressed, circuit 267 (BN/LG) is grounded by the memory switch, which signals the DSM to adjust the exterior mirrors to the previously set position. When memory button 2 is pressed, circuit 268 (BK/OG) is grounded by the memory switch, which also signals the DSM to adjust the exterior mirrors to the previously set position. When the memory set button is pressed, circuit 270 (BN/OG) is grounded which signals the DSM to store the current exterior mirrors position to the next button (1 or 2) that is pressed (only if pressed within 5 seconds of the set button). Exterior mirror positions are monitored by the DSM through circuits 949 (RD/WH), 951 (DB/WH), 954 (DG/WH), 955 (GY), 957 (VT/WH) and 958 (GY/RD).

Possible Causes
- Circuit 875 (BK/LB) open
- Circuit 267 (BN/LG) open
- Circuit 268 (BK/OG) open
- Circuit 270 (BN/OG) open
- Circuit 272 (WH/OG) open
- Circuit 949 (RD/WH) short to ground, short to voltage or open
- Circuit 951 (DB/WH) short to ground, short to voltage or open
- Circuit 954 (DG/WH) short to ground, short to voltage or open
- Circuit 955 (GY) short to ground, short to voltage or open
- Circuit 957 (VT/WH) short to ground, short to voltage or open
- Circuit 958 (GY/RD) short to ground, short to voltage or open
- Memory set switch
- Exterior mirror control switch
- Exterior mirror
- DSM